Electronic integrated circuit devices are typically formed on substrates, most commonly on semiconductor substrates, by the sequential deposition and etching of conductive, semiconductive and insulative film layers. As the deposition layers are sequentially deposited and etched, the uppermost surface of the substrate, i.e., the exposed surface of the uppermost layer on the substrate, becomes progressively more non-planar. This occurs because the height of the uppermost film layer, i.e., the distance between the outer surface of that layer and the surface of the underlying substrate, is greatest in regions of the substrate where the least etching has occurred, and least in regions where the greatest etching has occurred.
This non-planar surface presents a problem for the integrated circuit manufacturer.
The etching step typically includes depositing a photo-resist layer on the exposed surface of the substrate, and then selectively removing portions of the resist bay a photolithographic process to provide the etch pattern on the layer. If the layer is non-planar, photolithographic techniques of patterning the resist might not be suitable because the surface of the substrate may be sufficiently non-planar to prevent focusing of the photographic apparatus on the entire layer surface. Therefore, a need exists to periodically planarize the substrate surface to restore a planar layer surface for photolithography.
Polishing is also usable in a fabrication process in which a metal layer is defined into metal lines with narrow spaces between. A thick silicon oxide layer is then deposited to fill the spaces but to also overfill so as to produce an oxide layer overlying the metal lines, with a oxide layer having a generally planar top surface. Polishing is then used to remove the silicon oxide down to the metal lines and possibly remove a little more material including both metal and oxide. As a result, this polishing is effectively designed to be a planar process.
Chemical mechanical polishing is one accepted method of planarization. This planarization method typically requires that the substrate be mounted in a wafer polishing head with its surface to be polished exposed at its surface facing the head. The head, wutg the attached substrate, is placed against a rotating polishing pad. The head may also rotate, to provide additional motion between the substrate and the polishing surface. Further, a polishing slurry is supplied to the interface between the pad and the substrate being polished. This slurry typically includes an abrasive and at least one chemically reactive agent therein, which are selected to enhance the polishing of the film layers of the substrate.
The polishing pad provides a surface having specified polishing characteristics. Thus, for any material being polished, the pad and slurry combination are theoretically capable of providing a specified finish and flatness on the polished surface. Typically, the actual polishing pad and slurry combination selected for a given material are based on a trade off between the polishing rate, and therefore the throughput of wafers through the machine, and the need to provide a desired finish and flatness on the substrate on the substrate. Because the flatness and surface finish of the film layer can limit the utility of the substrate in subsequent fabrication steps, the fabricator's selection of a polishing pad and slurry are usually dictated by the needed finish and flatness, and the polishing time is a resulting limitation on the throughput of substrates through the polishing apparatus.
An additional limitation on polishing throughput arises because the polishing material becomes packed with the debris of polishing, and it also becomes compressed in the regions where the substrate was pressed against it for polishing. This condition, commonly referred to as "glazing", causes the polishing surface to become less abrasive, with the result that the polishing time necessary to polish any individual substrate increases. Therefore, the polishing surface must be periodically restored, or conditioned, in order to maintain a high throughput of substrates through the polishing apparatus.
One method of increasing throughput uses a wafer head having a plurality of substrate loading stations therein to simultaneously load a plurality of substrates into the head in opposition to a single polishing pad to enable simultaneous polishing of the substrates on the single polishing pad. Although this method would appear to provide substantial throughput increases over the single-substrate style of polishing head, several factors militate against the use of such carrier arrangements for planarizing substrates, particularly after deposition layers have been formed thereon. First, the head is complex, and, in order to attempt to provide control of the loading of each of the substrates against the pad, a substantial number of moving parts and pressure lines must be provided.
Additionally, the control over the polishing of each of the substrates is limited, and is a compromise between individual control and ease of controlling the general polishing attributes of the multiple substrates. Finally, if any one substrate develops a problem, such as if a substrate cracks, the broken piece of the substrate may come loose and destroy all of the substrates.
Therefore, the need exists in the art for a polishing apparatus which enables the optimization of polishing throughput, flatness, and finish while minimizing the risk of contamination or destruction of any substrate.